1. Field of the Invention
The present invention relates to an image forming apparatus and an image forming method.
2. Description of the Related Art
Image processing devices such ASIC execute image processing based on image processing parameters set in a register included in the device. The setting of the image processing parameters in the register is executed by a CPU, which is the generation source of the parameters. Furthermore, in order to reduce the load of the CPU, there is a method of transferring the image processing parameters stored in a RAM (Random Access Memory) to the register, by DMA transfer.
In the case of DMA transfer, the CPU records a plurality of image processing parameters in a RAM. Furthermore, the CPU generates a descriptor chain, and records the descriptor chain in the RAM. A descriptor chain is an assembly of descriptors indicating addresses of the respective image processing parameters.
At the time of DMA transfer, a plurality of image processing parameters are acquired from the RAM based on the descriptor chain, and the image processing parameters are transferred to the register.
For example, there is disclosed a technology of simultaneously reading the front side and the back side of an original document, and also acquiring image processing parameters for the front side or the back side from a memory, based on the analysis result of whether to perform image processing on the front side or the back side of the original document, and transferring the image processing parameters to a register by DMA transfer (see, for example, Patent Document 1).
However, there have been cases where the processing load of the CPU cannot be appropriately reduced according to image processing.
For example, when transferring the image processing parameters to a register by DMA transfer, overhead occurs in the CPU for generating a descriptor chain, and therefore depending on the type of image processing, the processing load on the CPU becomes higher than the case of directly recording the image processing parameters in the register from the CPU.
Patent Document 1: Japanese Laid-Open Patent Publication No. 2013-066072